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楼主: network

精彩图解服务器CPU之MIPS篇

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 楼主| 发表于 2008-12-31 20:07:30 | 显示全部楼层
32 and 64-bit CoresMIPS Technologies offers the industry's broadest array of low power, high-performance embedded microprocessors that power tens of millions of products around the globe. The company develops processor cores targeted for every unique design need, from entry-level to some of the industry’s highest performing cores. MIPS targets high-growth markets that are paving the way for next-generation embedded designs, including emerging broadband access, innovative digital consumer and networking, and state-of-the-art communications.





64-bit CoresMIPS Technologies offer the highest performance synthesizable and custom hard cores by its implementation of the MIPS64® architecture.

The MIPS64® 5K® family of synthesizable processor cores enables SoC designers to get to the highest frequency and performance for their application while having the flexibility of choosing any foundry processes and choosing the right configuration to suit the needs of their application. The 5Kc core delivers performance of 1.4 DMIPS/MHz and a worst case operating frequency of 350MHz in a .13um process node. The 5Kf core integrates a floating point unit to a 64-bit processor to enable cutting-edge digital consumer applications.

The MIPS64 20Kc™ core is the fastest licensable embedded microprocessor IP available today in the industry. It has a typical operating frequency of 600MHz and a worst case operating frequency of 533MHz at the .13um process technology node. It is available from MIPS as a full custom hardened processor core from multiple foundries. The semiconductor companies can quickly get to market with an advanced high performance system-on-chip (SoC) design with a dropped-in 20Kc at a foundry of their choice. The 20Kc core is a full dual issue superscalar machine implementing a 7 stage pipeline. It includes a IEEE754 compliant SIMD Floating-Point-Unit (FPU) with MIPS-3D graphics extensions to accelerate geometry calculations. It can execute 2 integer instructions or 1 integer and 1 floating point instructions per cycle. The core delivers 1020 DMIPS version 2.1 (no inlining) of integer performance and delivers a 2.4 GFLOPS peak floating point performance at 600MHz operating frequency.


MIPS64® Family Features 5Kc® 5Kf® 20Kc™
Pipeline Design MIPS64
6-Stage MIPS64
6-Stage MIPS64
7-Stage
Issue Ratetd Limited Dual Issue Limited Dual Issue Full Dual Issue
Synthesizable or Hard Synthesizable Synthesizable Custom Hard Core
Fast Multiplier yes yes yes
Full MMU yes yes yes
Cache Controller  yes yes yes
Max Cache Size 64KB 64KB 32KB (fixed)
Date Cache Type Write Back Write Back Write Back
Floating Point Unit no yes yes
MIPS3D ASE no no yes



MIPS64® Family SpecsProcess 0.13um LV
Process Process Process Process
Issue Rate 5Kc® 5Kf® 20Kc™
Frequency Worst case 350 MHz Worst case 320 MHz Worst case 533 MHz
Area
(when synthesized for area) 1.8-2.6 mm(2) (no caches) 3.0-4.4 mm(2) (no caches) 20 mm(2) - Hard Core (Includes 32K/32K L1 caches, FPU and TLB)
DMIPS/MHz v2.1(no inlining) 1.4 1.4 1.7
Max DMIPS v2.1 (with no inlining) 490 490 906

Questions?
MIPS can help you with your design considerations.
Contact Us
White Paper
How to Choose a CPU Core for
 楼主| 发表于 2009-4-26 09:12:23 | 显示全部楼层
目前多核主要以Intel和MIPS两个阵营。MIPS主要有RMI和cavium。Intel主要主频高,计算能力强而著称。RMI主要使用超线程,但是主频低。对于转发的速度可以。现在主要以华为为主。cavium最多32核,处理能力在20G。目前主要以hillstone为代表。Intel多核主要还是主流的安全厂家在使用,checkpoint等。大家发表些建议,我观点仅供参考。多学习点关于多核的知识,呵呵呵呵
 楼主| 发表于 2009-4-26 09:13:24 | 显示全部楼层
目前来说,国内采用CAVIUM的OCTEN处理器的厂家也不少,但制造出来的产品大多数都是象征技术严发能力的产品,价格报得超高(估计还存在BUG),像TOPSEC、LEADSEC、SECWORLD推出的银河(RMI的RAZA)、金刚(CAVIUM)、3600X(CAVIUM)等,只有HILLSTONE的基于OCTEN的防火墙是比较成熟的MIPS架构处理器的产品,而且“号称”是64位的操作系统,但是整体来说也没什么太多的特点
 楼主| 发表于 2009-4-26 09:13:46 | 显示全部楼层
目前国内有好几家安全厂商基于多核平台开发安全产品,比如天融信的银河万兆基于RMI,HillStone的UTM基于Octeon,启明星辰也是基于Octeon开发UTM。
 楼主| 发表于 2009-4-26 09:14:25 | 显示全部楼层
Cavium和RMI都作为多核处理器,在技术架构有一些的不同,Cavium内部是总线架构的,与RMI最大的区别就是集成了一些协处理器,表面看起来非常适合做安全,但这个优点同时也是其一个致命的缺点,它对于软件的适用性有很紧密的相关性,这就使得软件的灵活性统一架构就受到限制.另外,RMI内部采用的是快速消息网络的方式,相对Cavium的内部是高速总线架构,这样RMI的核之间的交互性能非常高,会使得系统开销非常小,单个CPU核的计算功能方面是很高的,RMI是8核32硬件线程的,而Cavium是16个核,无硬件多线程的.
 楼主| 发表于 2009-4-26 09:14:52 | 显示全部楼层
这问题从不同角度看有不同的结果。

确实Cavium的芯片编程处理难度很大,但从另一个方面来说,如果一个厂商攻克了这部分的问题,那么后续的功能和产品化就会很顺利,例如山石能够很快推出全线多核产品,并且加入了防病毒功能。

而RMI的好处是厂家提供几乎完整的防火墙软件实现,适合快速推出样品宣传。像天融信、联想网御、网御神州这些都是这样。但后续如果想实现高性能应用层处理就需要增加额外的处理器,到这个时候RMI的产品化难度反而高于Cavium了。
 楼主| 发表于 2009-4-26 09:15:12 | 显示全部楼层
联想网御KingGuard金刚基于多核
山石科技基于多核
H3c基于多核
其他厂商就不敢说是否是真的用了多核,即使用了多核芯片,能否发挥多核的优势也是一个值得怀疑的问题
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