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发表于 2008-12-31 20:07:30
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32 and 64-bit CoresMIPS Technologies offers the industry's broadest array of low power, high-performance embedded microprocessors that power tens of millions of products around the globe. The company develops processor cores targeted for every unique design need, from entry-level to some of the industry’s highest performing cores. MIPS targets high-growth markets that are paving the way for next-generation embedded designs, including emerging broadband access, innovative digital consumer and networking, and state-of-the-art communications.
64-bit CoresMIPS Technologies offer the highest performance synthesizable and custom hard cores by its implementation of the MIPS64® architecture.
The MIPS64® 5K® family of synthesizable processor cores enables SoC designers to get to the highest frequency and performance for their application while having the flexibility of choosing any foundry processes and choosing the right configuration to suit the needs of their application. The 5Kc core delivers performance of 1.4 DMIPS/MHz and a worst case operating frequency of 350MHz in a .13um process node. The 5Kf core integrates a floating point unit to a 64-bit processor to enable cutting-edge digital consumer applications.
The MIPS64 20Kc™ core is the fastest licensable embedded microprocessor IP available today in the industry. It has a typical operating frequency of 600MHz and a worst case operating frequency of 533MHz at the .13um process technology node. It is available from MIPS as a full custom hardened processor core from multiple foundries. The semiconductor companies can quickly get to market with an advanced high performance system-on-chip (SoC) design with a dropped-in 20Kc at a foundry of their choice. The 20Kc core is a full dual issue superscalar machine implementing a 7 stage pipeline. It includes a IEEE754 compliant SIMD Floating-Point-Unit (FPU) with MIPS-3D graphics extensions to accelerate geometry calculations. It can execute 2 integer instructions or 1 integer and 1 floating point instructions per cycle. The core delivers 1020 DMIPS version 2.1 (no inlining) of integer performance and delivers a 2.4 GFLOPS peak floating point performance at 600MHz operating frequency.
MIPS64® Family Features 5Kc® 5Kf® 20Kc™
Pipeline Design MIPS64
6-Stage MIPS64
6-Stage MIPS64
7-Stage
Issue Ratetd Limited Dual Issue Limited Dual Issue Full Dual Issue
Synthesizable or Hard Synthesizable Synthesizable Custom Hard Core
Fast Multiplier yes yes yes
Full MMU yes yes yes
Cache Controller yes yes yes
Max Cache Size 64KB 64KB 32KB (fixed)
Date Cache Type Write Back Write Back Write Back
Floating Point Unit no yes yes
MIPS3D ASE no no yes
MIPS64® Family SpecsProcess 0.13um LV
Process Process Process Process
Issue Rate 5Kc® 5Kf® 20Kc™
Frequency Worst case 350 MHz Worst case 320 MHz Worst case 533 MHz
Area
(when synthesized for area) 1.8-2.6 mm(2) (no caches) 3.0-4.4 mm(2) (no caches) 20 mm(2) - Hard Core (Includes 32K/32K L1 caches, FPU and TLB)
DMIPS/MHz v2.1(no inlining) 1.4 1.4 1.7
Max DMIPS v2.1 (with no inlining) 490 490 906
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